Make a decade counter that counts 1 through 10, inclusive. The reset input is synchronous, and should reset the counter to 1.
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1 module top_module (
2 input clk,
3 input reset,
4 output [3:0] q);
5 always @(posedge clk)begin
6 if(reset || q>=4'd10)begin //為什麼這裡是4'd10?哦,因為這裡直接使用d十進位制,但是注意是4位
7 //來表示,上一題也一樣,用的是十進位制9
8 q<=4'b1;
9 end
10 else begin
11 q<=q+1'b1;
12 end
13 end
14
15 endmodule