Build a decade counter that counts from 0 through 9, inclusive, with a period of 10. The reset input is synchronous, and should reset the counter to 0.
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1 module top_module (
2 input clk,
3 input reset, // Synchronous active-high reset
4 output [3:0] q);
5 always @(posedge clk)begin
6 if(reset || q >= 4'd9)begin //這裡是什麼意思?
7 q<=4'b0;
8 end
9 else begin
10 q<=q+1'b1;
11 end
12 end
13
14 endmodule
再寫:
構建一個十進位制計數器,從0-9,迴圈
對於註釋“if(reset || q >= 4'd9)begin //這裡是什麼意思?”,這裡等於是將兩種情況,一個是重置,一個是迴圈到頭,兩者一起寫了
module top_module (
input clk,
input reset, // Synchronous active-high reset
output [3:0] q);
always@(posedge clk)begin
if(reset)begin
q<=0;
end
else begin
if(q==4'd9)begin
q<=0;
end
else begin
q<=q+1'b1;
end
end
end
endmodule