MT8788基帶晶片規格書,MT8788資料手冊
MT8788處理器具有整合的藍芽、fm、wlan和gps模組,是一個高度整合的基帶平臺,包括調變解調器和應用處理子系統,啟用LTE/LTE-A和C2K智慧裝置應用程式。該晶片整合了工作在2.0GHz的ARM Cortex-A73、最高可達2.0GHz的ARM Cortex-A53和功能強大的多標準影片編解碼器。在……裡面此外,還包括一套廣泛的介面和連線外圍裝置,用於與攝像機、觸控式螢幕顯示器和ufs/mmc/sd卡的介面。
該應用程式處理器是一個多核ARM Cortex-A73,ARM Cortex-A53 MPCoreTM,配備了霓虹燈引擎,提供了支援最新OpenOS所需的處理能力及其要求。應用程式,如網頁瀏覽、電子郵件、gps導航和遊戲。
所有這些都顯示在高解析度觸控式螢幕上,並透過2D和3D圖形加速增強了圖形。
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高階別MT8788功能框圖
1.2 Platform Features
General
Tablet, two MCU subsystems architecture
Supports eMMC/uFS boot
Supports LPDDR3
Supports LPDDR4X
AP MCU subsystem
Quad-core ARM® 2.0GHz Cortex-A73 MPCoreTM with 64KB L1 I-cache, 64KB L1 D-cache and 1MB unified L2 cache
Quad-core ARM® 2.0GHz Cortex-A53 MPCoreTM with 32KB L1 I-cache, 32KB L1 D-cache and 1MB unified L2 cache
NEON multimedia processing engine with SIMDv2/VFPv4 ISA support
DVFS technology with adaptive operating voltage from 0.6V to 1.12V
MD MCU subsystem
Imagination MIPS32® InterAptive processor with max. 864MHz operation frequency
High-performance multi-core and multi thread processor architecture (two cores and two threads)
32KB L1 I-cache and 32KB L1 D-cache per core
384KB SPRAM (Scratchpad memory,Two-Core’s ISPRAM and DSPRAM)
256KB L2 Cache (share L2 cache for two cores)
High-performance AXI bus Interfaces
Power management for clock gating control
FD216 DSP for running GSM modem with max. 312MHz operation frequency
1.3 Modem Features
LTE
FDD/TDD Up to 300Mbps downlink,150Mbps uplink
Downlink carrier aggregation (CA) ability;1.4 to 20MHz RF bandwidth per component carrier (CC) and up to 2 CCs
8*2 downlink SU-MIMO per component carrier
Downlink MU-MIMO per component carrier
Supports feICIC
Supports MBMS
Uplink CoMP ability
Advanced Interference Cancellation
Transmit Atenna Selection
GSM modem and voice CODEC
Dial tone generation
Noise reduction
Echo suppression
Advanced side-tone oscillation reduction
Digital side-tone generator with programmable gain
2 programmable acoustic compensation filters
GSM quad vocoders for adaptive multi rate (AMR), enhanced full rate (EFR), full rate (FR) and half rate (HR)
GSM channel coding, equalization and A5/1, A5/2 and A5/3 ciphering
GPRS GEA1, GEA2 and GEA3 ciphering
Programmable GSM/GPRS/EDGE modem
Packet switched data with CS1/CS2/CS3/CS4 coding schemes
GSM circuit switch data
GPRS/EDGE Class 12
1.4 Connectivity Features
MT8788包括四個無線連線功能:
WLAN
Bluetooth
GPS
FM Receiver
1.5 Multimedia Features
Display
Portrait panel resolution up to FHD(2,400*1,080)
MIPI DSI interface (4 data lanes)
MiraVisionTM for picture quality enhancement
Embedded LCD gamma correction
True colors
8 overlay layers with per-pixel alpha channel and gamma table
Spatial and temporal dithering
Side-by-side format output to stereo 3D panel in both portrait and landscape modes
Color enhancement
Adaptive contrast enhancement
Image/video/graphic sharpness enhancement
Dynamic backlight scaling
Graphics
3D Graphic accelerator capable of processing 2,400M pixel/sec @ 800MHz
OpenGL ES 3.2/3.1/3.0/2.0/1.1
Vulkan 1.0
OpenCL 1.x and 2.x
Video
HEVC decoder 1080p @ 30fps/40Mbps
VP9 decoder 1080p @ 30fps/40Mbps
H.264 decoder: Baseline 1080p @30fps/40Mbps
H.264 decoder: Main/high profile 1080p@30fps/40Mbps
Sorenson H.263/H.263 decoder: 1080p@ 30fps/40Mbps
MPEG-4 SP/ASP decoder: 1080p @30fps/40Mbps
DIVX4/DIVX5/DIVX6/DIVX HD/XVID decoder: 1080p @ 30fps/40Mbps
MPEG2 decoder 1080p @ 30fps/40Mbps
MPEG-4 encoder: Simple profile D1 @30fps
H.263 encoder: Simple profile D1 @ 30fps
H.264 encoder: High profile 1080p @30fps
Speech
Speech codec (FR, HR, EFR, AMR FR,AMR HR and Wide-Band AMR)
CTM
Noise reduction
Noise suppression
Noise cancellation
Dual-MIC noise cancellation
Echo cancellation
Echo suppression
Dual-MIC voice tracking
Dual-MIC sound recording w/o Wind Noise Rejection
MagiLoudness (enhances the voice clarity based on near end environment noise)
MagiClarity (maximizes loudness while controlling the maximum receiver output power; feed-forward receiver protection)
Compensation filter and digital gain for both uplink and downlink paths
2 Product Description
2.1 Pin Description 2.1.1 Ball Map View
LPDDR4球圖檢視
LPDDR3球地圖檢視
2.1.2 Pin Coordinate
引腳座標LPDDR 4
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