佛薩奇公排系統模式開發原始碼部署（Demo）

常見的SPI通訊實現一般包括4根線，CLK,CS,MOSI,MISO，協議的原理比較簡單，其實就是在時鐘的不同邊沿處選擇輸入還是輸出，當選擇是輸入的時候，資料線要有保持資料的能力；當輸出的時候，資料線要能夠改變電平來輸出資料。

概況

The W25Q128BV (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1μA for power-down. The W25Q128BV array is organized into 65,536 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q128BV has 4,096 erasable sectors and 256 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.) The W25Q128BV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual Output and 280MHz (70MHz x 4) for Quad SPI when using the Fast Read Quad SPI instructions. These transfer rates can out perform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number.

根據CLK的極性（兩個取樣沿，空閒時電平是高是低），SPI可以分4種工作模式（CLK的排列組合），這裡不介紹工作模式（因為圖也不一定對）。主要說一下以下幾點

• 無論是哪種模式，當採集的時候，電平要保持住，不採集的時候，電平可以改變
• 由於CLK的存在，取樣和變更電平的是要遵守時序的
• 這裡注意一下SDI和SDO的流向，當SCLK上升沿時，對主機M是輸入，取樣階段，因此SDI資料是保持住的，當SCLK下降沿時，對主機M是輸出，SDO是保持狀態

從上面的介紹可以看出，實現SPI最少可以只需要2根線，即SCL和SDA，由SCL提供時序，SDA用來傳輸資料。這時由於一個時鐘週期內只能提供兩個邊沿，因此只能是一個邊沿取樣，一個邊沿輸出（改變電平）。

回到W25Q128上： 引腳描述

這裡主要介紹幾個引腳，IO，防寫，保持。IO這裡由於支援3種多路SPI方式，因此當採用標準SPI時，DI腳輸入，在CLK上升沿寫入地址或資料，DO在CLK下降沿輸出。

防寫和保持均由暫存器2控制，當暫存器2設定為雙路或4路時，防寫和保持的原有功能失效。