GNU make manual 翻譯( 一百二十三)

weixin_34119545發表於2012-09-26

繼續翻譯

4.14 Generating Prerequisites Automatically
===========================================

In the makefile for a program, many of the rules you need to write often
say only that some object file depends on some header file.  For
example, if `main.c' uses `defs.h' via an `#include', you would write:

     main.o: defs.h

You need this rule so that `make' knows that it must remake `main.o'
whenever `defs.h' changes.  You can see that for a large program you
would have to write dozens of such rules in your makefile.  And, you
must always be very careful to update the makefile every time you add
or remove an `#include'.  

   To avoid this hassle, most modern C compilers can write these rules
for you, by looking at the `#include' lines in the source files.
Usually this is done with the `-M' option to the compiler.  For
example, the command:

     cc -M main.c

generates the output:

     main.o : main.c defs.h

Thus you no longer have to write all those rules yourself.  The
compiler will do it for you.

4.14 自動生成前提條件
===========================================

在為程式而作的 makefile 中，很多你需要寫的規則經常說 有些檔案依賴於某些標頭檔案。

例如，如果你的 main.c 通過 #include 使用了 defs.h， 你可能會寫： 

main.o: defs.h

你需要這個規則，於是 make 知道它必須重新構建 main.o ，只要defs.h 檔案變化了就是如此。你會看到對一個大型程式而言你不得不寫很多這樣的規則。並且，每次增加或減少 #include ，你必須總是十分小心地修改 makefile。

為了避免這個煩惱，很多現代的C 編譯器可以通過查詢原始檔中的 #include 行來為你寫這些規則。通常這是通過 編譯器的 -M選項來實現的。例如，如下指令：

cc -M main.c

導致如下的輸出:

main.o : main.c defs.h

這樣你不用再自己必須寫所有的規則了。編譯器將要為你作這件事情。

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