u-boot-2014.10移植第21天----新增nand flash命令支援(三)
硬體平臺:tq2440
開發環境:Ubuntu-3.11
u-boot版本:2014.10
本文允許轉載,請註明出處:http://blog.csdn.net/fulinus
雖說nand flash讀寫操作是可以了,但是我使用nand markbad命令將一個塊標記為壞塊時,再用nand scrub命令恢復出廠設定時,卻出現了下面的錯誤:
nand0: MTD Erase failure: -5
說明我們的nand flash移植是不完全正確的。下面查詢原因
在檔案drivers/mtd/nand/s3c2440_nand.c中開頭部分只留下這些巨集,前面說過了該檔案中所有的2410字樣的都改成了2440了,所以不要在下面修改時有什麼覺得奇怪:
#define S3C2440_NFCONF_TACLS(x) ((x)<<12)
#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
#define S3C2440_NFCONT_EN (1<<0)
#define S3C2440_NFCONT_INITECC (1<<4)
#define S3C2440_NFCONT_nFCE (1<<1)
#define S3C2440_NFCONT_MAINECCLOCK (1<<5)
#define S3C2440_ADDR_NALE 8
#define S3C2440_ADDR_NCLE 0x0c
之前很多巨集定義的是2410的nand flash暫存器的位,在2440上就有很多不同了,比如原來在NFCONF暫存器中的內容移到了NFCONT暫存器中去了。
修改s3c2440_hwcontrol函式中不再是S3C2440_NFCONF_nFCE巨集,而是S3C2440_NFCONT_nFCE巨集:
static void s3c2440_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
struct s3c2440_nand *nand = s3c2440_get_base_nand();
debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
if (ctrl & NAND_CTRL_CHANGE) {
ulong IO_ADDR_W = (ulong)nand;
if (!(ctrl & NAND_CLE))
IO_ADDR_W |= S3C2440_ADDR_NCLE;
if (!(ctrl & NAND_ALE))
IO_ADDR_W |= S3C2440_ADDR_NALE;
if(cmd == NAND_CMD_NONE)
IO_ADDR_W = (ulong)&nand->nfdata;
chip->IO_ADDR_W = (void *)IO_ADDR_W;
if (ctrl & NAND_NCE) /* 使能選中 */
writel(readl(&nand->nfconf) & ~S3C2440_NFCONT_nFCE,
&nand->nfconf);
else /* 取消選中 */
writel(readl(&nand->nfconf) | S3C2440_NFCONT_nFCE,
&nand->nfconf);
}
if (cmd != NAND_CMD_NONE)
writeb(cmd, chip->IO_ADDR_W);
}
在s3c2440_nand_enable_hwecc函式中修改:
void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
{
struct s3c2440_nand *nand = s3c2440_get_base_nand();
debug("s3c2440_nand_enable_hwecc(%p, %d)\n", mtd, mode);
writel(((readl(&nand->nfconf) | S3C2440_NFCONT_INITECC) &
(~S3C2440_NFCONT_MAINECCLOCK)), &nand->nfconf);
}
在arch/arm/include/asm/arch-s3c24x0/s3c24x0.h 檔案中修改:
/* NAND FLASH (see S3C2440 manual chapter 6) */
struct s3c2440_nand {
u32 nfconf;
u32 nfcont;
u32 nfcmd;
u32 nfaddr;
u32 nfdata;
u32 nfeccd0;
u32 nfeccd1;
u32 nfeccd;
u32 nfstat;
u32 nfstat0;
u32 nfstat1;
u32 nfmecc0;
u32 nfmecc1;
u32 nfsecc;
u32 nfsblk;
u32 nfeblk;
};
注:arch/arm/include/asm/目錄下的arch目錄其實是arch/arm/include/asm/arch-s3c24x0/目錄的符號連結。在s3c2440_nand_calculate_ecc函式中修改:
static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
struct s3c2440_nand *nand = s3c2440_get_base_nand();
ecc_code[0] = readb(&nand->nfmecc0);
ecc_code[1] = readb(&nand->nfmecc0 + 1);
ecc_code[2] = readb(&nand->nfmecc0 + 2);
ecc_code[3] = readb(&nand->nfmecc0 + 3);
debug("s3c2440_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x 0x%02x\n",
mtd , ecc_code[0], ecc_code[1], ecc_code[2], ecc_code[3]);
return 0;
}
在s3c2440_nand_correct_data函式中修改:
static int s3c2440_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
struct s3c2440_nand *nand = s3c2440_get_base_nand();
u32 estat0,err_byte_addr;
int ret = -1;
u8 repaired;
writel((read_ecc[1] << 16) | read_ecc[0],&nand->nfeccd0);
writel((read_ecc[3] << 16) | read_ecc[2],&nand->nfeccd1);
/* Read ecc status */
estat0= readl(&nand->nfstat);
switch(estat0 & 0x3) {
case 0: /* No error */
ret= 0;
break;
case 1:
/*
* 1 bit error (Correctable)
* (nfestat0 >> 7) & 0x7ff :error byte number
* (nfestat0 >> 4) & 0x7 :error bit number
*
*/
err_byte_addr= (estat0 >> 7) & 0x7ff;
repaired= dat[err_byte_addr] ^ (1 << ((estat0 >> 4) & 0x7));
printf("S3C NAND: 1 bit error detected at byte%d. "
"Correcting from 0x%02x to0x%02x...OK\n",
err_byte_addr, dat[err_byte_addr],repaired);
dat[err_byte_addr]= repaired;
ret= 1;
break;
case 2: /* Multiple error */
case 3: /* ECC area error */
printf("S3C NAND: ECC uncorrectable errordetected. "
"Not correctable.\n");
ret= -1;
break;
}
return ret;
}
static void s3c2440_nand_select(struct mtd_info *mtd, int chipnr)
{
struct s3c2440_nand *nand = s3c2440_get_base_nand();
switch(chipnr){
case -1: /* 取消選中 */
nand->nfcont |= (1<<1);
break;
case 0: /* 選中 */
nand->nfcont &= ~(1 << 1);
break;
default:
BUG();
}
return;
}
在board_nand_init函式中修改如下:
int board_nand_init(struct nand_chip *nand)
{
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c2440_nand *nand_reg = s3c2440_get_base_nand();
debug("board_nand_init()\n");
writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
/* initialize hardware */
tacls = CONFIG_S3C24XX_TACLS;
twrph0 = CONFIG_S3C24XX_TWRPH0;
twrph1 = CONFIG_S3C24XX_TWRPH1;
cfg = 0;
cfg |= S3C2440_NFCONF_TACLS(tacls - 1);
cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
writel(cfg, &nand_reg->nfconf);
/* 初始化ECC、禁止片選、使能NAND FLASH控制器 */
cfg = (0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(0<<6)|(0<<5)|(1<<4)|(0<<1)|(1<<0);
writel(cfg, &nand_reg->nfcont);
/* initialize nand_chip data structure */
nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
nand->IO_ADDR_W = (void *)&nand_reg->nfdata;
nand->select_chip = NULL;
/* read_buf and write_buf are default */
/* read_byte and write_byte are default */
#ifdef CONFIG_NAND_SPL
nand->read_buf = nand_read_buf;
#endif
/* hwcontrol always must be implemented */
nand->cmd_ctrl = s3c2440_hwcontrol;
nand->dev_ready = s3c2440_dev_ready;
#ifdef CONFIG_S3C2440_NAND_HWECC
nand->ecc.hwctl = s3c2440_nand_enable_hwecc;
nand->ecc.calculate = s3c2440_nand_calculate_ecc;
nand->ecc.correct = s3c2440_nand_correct_data;
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
nand->ecc.strength = 1;
#else
nand->ecc.mode = NAND_ECC_SOFT;
#endif
#ifdef CONFIG_S3C2440_NAND_BBT
nand->bbt_options |= NAND_BBT_USE_FLASH;
#endif
debug("end of nand_init\n");
return 0;
}
board_nand_init函式函式中涉及到幾個巨集需要在include/configs/tq2440.h檔案中定義:
參考博文UBOOT移植(NAND FLASH的支援)——初步移植 (一)
前面定義的CONFIG_SYS_S3C2440_NAND_HWECC巨集名在s3c2440_nand.c檔案中卻是CONFIG_S3C2440_NAND_HWECC巨集名,發現CONFIG_NAND_S3C2440巨集也沒有在哪裡有用到,這裡刪除它。
在include/configs/tq2440.h檔案中修改如下:
/*
* NAND configuration
*/
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_S3C2440
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x4E000000
#define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
#ifdef CONFIG_S3C24XX_CUSTOM_NAND_TIMING
#define CONFIG_S3C24XX_TACLS 0
#define CONFIG_S3C24XX_TWRPH0 4
#define CONFIG_S3C24XX_TWRPH1 2
#endif
#define CONFIG_S3C2440_NAND_HWECC
#ifdef CONFIG_S3C2440_NAND_HWECC
#define CONFIG_SYS_NAND_PAGE_SIZE 512
#define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
#define CONFIG_SYS_NAND_ECCBYTES 4
#endif
#endif /* end CONFIG_CMD_NAND */
在drivers/mtd/nand/nand_base.c檔案中修改nand_select_chip函式:
static void nand_select_chip(struct mtd_info *mtd, int chipnr)
{
struct nand_chip *chip = mtd->priv;
switch (chipnr) {
case -1:
chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
break;
case 0: /* 選中 */
//chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_CTRL_CLE|NAND_CTRL_CHANGE);
break;
default:
BUG();
}
}
編譯執行
情況依舊:
nand0: MTD Erase failure: -5
明天繼續!
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