實驗現象:
利用Quartus內部元件生成鎖相環,用SignalTap II進行校驗。
核心程式碼:
module pll( input clk_25m, output clk_100m, output clk_50m, output clk_25m_out, output clk_12_5m, output clk_6_25m ); //--------------------my_pll--------------------------------// my_pll u1( .inclk0(clk_25m), .c0(clk_100m), .c1(clk_50m), .c2(clk_25m_out), .c3(clk_12_5m), .c4(clk_6_25m) ); //--------------------endmodule-----------------------------// endmodule
原始碼下載連結:
連結:http://pan.baidu.com/s/1o85cX2i 密碼:auot
iCore4連結: